Note:
1.Connected directly to TX data input pins. AC coupled thereafter.
2.Or open circuit.
3.Into 100 ohms differential termination.
4.These are unfiltered 20-80% values
5.Loss Of Signal is LVTTL. Logic 0 indicates normal operation; logic 1 indicates no signal detected.
6.Receiver sensitivity is compliant with power supply sinusoidal modulation of 20 Hz to 1.5 MHz up to specified value applied through the recommended power supply filtering network.
5. Digital Diagnostic Functions
transceivers support the 2-wire serial communication protocol as defined in the SFP+ MSA.
“The standard SFP serial ID provides access to identification information that describes the transceiver’s capabilities, standard interfaces, manufacturer, and other information.
Additionally, SFP+ transceivers provide a unique enhanced digital diagnostic monitoring interface, which allows real-time access to device operating parameters such as transceiver temperature, laser bias current, transmitted optical power, received optical power and transceiver supply voltage. It also defines a sophisticated system of alarm and warning flags, which alerts end-users when particular operating parameters are outside of a factory set normal range.
The SFP+ MSA defines a 256-byte memory map in EEPROM that is accessible over a 2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally defined serial ID memory map remains unchanged.
The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed through a 2-wire serial interface. When the serial protocol is activated, the serial clock signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the SFP transceiver into those segments of the E2PROM that are not write-protected. The negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit data words that can be addressed individually or sequentially. ”
6. Power Supply Filtering
The host board should use the power supply filtering shown in Figure 1.
Figure1. Host Board Power Supply Filtering
7. Pin Assignment
8. Transceiver Block Diagram
Pin
Symbol
Max Unit Conditions
Ref.
1
VEET
Transmitter Ground (Common with Receiver Ground)
1
2
TFAULT
Transmitter Fault.
2
3
TDIS
Transmitter Disable. Laser output disabled on high or open.
3
4
SDA
2-wire Serial Interface Data Line
4
5
SCL
2-wire Serial Interface Clock Line
4
6
MOD_ABS
Module Absent. Grounded within the module
4
7
RS0
Rate Select 0
5
8
LOS
Loss of Signal indication. Logic 0 indicates normal operation.
6
9
RS1
No connection required
1
10
VEER
Receiver Ground (Common with Transmitter Ground)
1
11
VEER
Receiver Ground (Common with Transmitter Ground)
1
12
RD-
Receiver Inverted DATA out. AC Coupled
13
RD+
Receiver Non-inverted DATA out. AC Coupled
14
VEER
Receiver Ground (Common with Transmitter Ground)
1
15
VCCR
Receiver Power Supply
16
VCCT
Transmitter Power Supply
17
VEET
Transmitter Ground (Common with Receiver Ground)
1
18
TD+
Receiver Power Supply
19
TD-
Transmitter Power Supply
20
VEET
Transmitter Ground (Common with Receiver Ground)
1
Note:
1.Circuit ground is internally isolated from chassis ground.
2.TFAULT is an open collector/drain output, which should be pulled up with a 4.7kΩ– 10 kΩ resistor on the host board if intended for use. Pull up voltage should be between 2.0V to Vcc + 0.3V.A high output indicates a transmitter fault caused by either the TX bias current or the TX output power exceeding the preset alarm thresholds. A low output indicates normal operation. In the low state, the output is pulled to <0.8V.
3.Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
4.Should be pulled up with 4.7kΩ- 10kΩ on host board to a voltage between 2.0V and 3.6V. MOD_ABS pulls line low to indicate module is plugged in.
5.Internally pulled down per SFF-8431 Rev 4.1.
6.LOS is open collector output. It should be pulled up with 4.7kΩ – 10kΩ on host board to a voltage between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.
9. Diagram Mechnical Drawing
Comly to SFF-8432 rev5.0, the improved Pluggable form factor specification.
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