100G QSFP28 SR4 100M is designed for 80km optical communication applications. This module contains 4- lane
optical transmitter, 4-lane optical receiver and module management block including 2 wire serial inter- face.
The optical signals are multiplexed to a single-mode fiber through an industry standard LC connector. A block
diagram is shown in Figure 1
The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial
communication commands. The ModSelL allows the use of multiple modules on a single 2-wire interface bus.
When the ModSelL is “High”, the module shall not respond to or acknowledge any 2-wire interface
communication from the host. ModSelL signal input node shall be biased to the “High” state in the module.
In order to avoid conflicts, the host system shall not attempt 2-wire interface communications within the
ModSelL de-assert time after any modules are deselected. Similarly, the host shall wait at least for the period
of the ModSelL assert time before communicating with the newly selected module. The assertion and deasserting
periods of different modules may overlap as long as the above timing requirements are met.
ResetL
The ResetL pin shall be pulled to Vcc in the module. A low level on the ResetL pin for longer than the minimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to their default state.
Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin is released. During the execution of a reset (t_init) the host shall disregard all status bits until the module indicates a completion of the reset interrupt.
The module indicates this by asserting “low” an IntL signal with the Data_Not_Ready bit negated. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.
LPMode
The LPMode pin shall be pulled up to Vcc in the module. The pin is a hardware control used to put modules into a low power mode when high. By using the LPMode pin and a combination of the Power override, Power_set and High_Power_Class_Enable software control bits (Address A0h, byte 93 bits 0,1,2).
ModPrsL
ModPrsL is pulled up to Vcc_Host on the host board and grounded in the module. The ModPrsL is asserted “Low” when inserted and deasserted “High” when the module is physically absent from the host connector.
IntL
IntL is an output pin. When IntL is “Low”, it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface.
The IntL pin is an open collector output and shall be pulled to host supply voltage on the host board.
The INTL pin is deasserted “High” after completion of reset, when byte 2 bit 0 (Data Not Ready) is read with a value of ‘0’ and the flag field is read (see SFF-8636).
2 Pin Description
Pin
Symbol
Name/Description
Note
1
GND
Ground
1
2
Tx2n
Transmitter Inverted Data Input
3
Tx2p
Transmitter Non-Inverted Data Input
4
GND
Ground
1
5
Tx4n
Transmitter Inverted Data Input
6
Tx4p
Transmitter Non-Inverted Data Input
7
GND
Ground
1
8
ModSelL
Module Select
9
ResetL
Module Reset
10
Vcc Rx
+3.3V Power Supply Receiver
2
11
SCL
2-wire serial interface clock
12
SDA
2-wire serial interface data
13
GND
Ground
14
Rx3p
Receiver Non-Inverted Data Output
15
Rx3n
Receiver Inverted Data Output
16
GND
Ground
1
17
Rx1p
Receiver Non-Inverted Data Output
18
Rx1n
Receiver Inverted Data Output
19
GND
Ground
1
20
GND
Ground
1
21
Rx2n
Receiver Inverted Data Output
22
Rx2p
Receiver Non-Inverted Data Output
23
GND
Ground
1
24
Rx4n
Receiver Non-Inverted Data Output
1
25
Rx4p
Receiver Inverted Data Output
26
GND
Ground
1
27
ModPrsL
Module Present
28
IntL
Interrupt
29
Vcc Tx
+3.3V Power supply transmitter
2
30
Vcc1
+3.3V Power supply
2
31
LPMode
Low Power Mode
32
GND
Ground
1
33
Tx3p
Transmitter Non-Inverted Data Input
34
Tx3n
Transmitter Inverted Data Input
35
GND
Ground
1
36
Tx1p
Transmitter Non-Inverted Data Input
37
Tx1n
Transmitter Inverted Data Input
38
GND
Ground
1
1.Circuit ground is internally isolated from chassis ground.
3 Absolute Maximum Ratings
It has to be noted that the operation in excess of any individual absolute maximum ratings
might cause permanent damage to this module.
Parameter
Symbol
Min.
Typical
Max.
Unit
Maximum Supply Voltage
Vcc
0
3.6
V
Storage Temperature
Ts
-40
85
°C
Relative Humidity
RH
15
85
%
1
Damage Threshold, each lane
THd
6.5
dBm
1. Non-condensing
4 Operating Environments
Electrical and optical characteristics below are defined under this operating environment, unless otherwise specified.
Parameter
Symbol
Min.
Typical
Max.
Unit
Supply Voltage
Vcc
3.135
3.3
3.465
V
Case Temperature
Top
0
70
°C
Link Distance with G.652
80
%
5 Electrical Characteristics
Parameter
Symbol
Min.
Typical
Max.
Unit
Note
Power dissipation
6.5
W
Supply Current
Icc
-40
1.8759
A
Steady
state
Transmitter
Data Rate, each lane
25.78125
Gbps
Differential Voltage pk-pk
Vpp
900
mV
At 1 MHz
Common Mode Voltage
Vcm
-350
2850
mV
Transition time
Trise/Tfall
10
ps
20%~80%
Differential Termination
Resistance Mismatch
10
%
Eye width
EW15
0.46
UI
Eye height
EH15
95
mV
6 Optical Characteristics
100GBASE-ZR4 Operation（EOL, TOP = 0 to +70 ℃ , VCC = 3.135 to 3.465 Volts）
Parameter
Unit
min
Typical
Max.
Note
Transmitter
Signaling Speed per Lane
Gb/s
25.78125 ± 100 ppm
Transmit wavelengths
nm
1294.53
1296.59
1299.02
1301.09
1303.54
1305.63
1308.09
1310.19
Side-Mode Suppression Ratio
(SMSR)
dB
30
Total Average Launch Power
dBm
8.0
12.5
Average launch power,
each lane
dBm
2.0
6.5
Difference in launch power between any two lanes
(Average and OMA)
dBm
3
Average launch power of OFF transmitter, each lane
Receiver 3 dB electrical upper cutoff frequency, each lane
GHz
31
Damage threshold, each lane
dBm
6.5
LOS Assert
dBm
-40
LOS Deassert
dBm
-29
LOS Hysteresis
dB
0.5
1. Sensitivity is specified at BER@5E-5 with FEC
7 Digital Diagnostic Monitoring Functions
100G QSFP28 ZR4 80KM support the I2C-based Diagnostic Monitoring Interface (DMI) defined in document SFF-
8636. The host can access real-time performance of transmitter and receiver optical power, temperature, supply
voltage and bias current.
Performance Item
Related Bytes(A0[00] memory)
Monitor Error
Notes
Module temperature
22 to 23
+/-3°C
1, 2
Module voltage
26 to 27
< 3%
2
LD Bias current
42 to 49
< 10%
2
Transmitter optical power
50 to 57
< 3dB
2
Receiver optical power
34 to 41
< 3dB
2
2
1
2
Note:
1，Actual temperature test point is fixed on module case around Laser.
2，Full operating temperature range
8 Alarm and Warning Thresholds
100G QSFP28 ZR4 80KM support alarms function, indicating the values of the preceding basic performance are lower or higher than the thresholds.
Performance Item
Related Bytes(A0[00] memory)
Unit
Low threshold
Notes
Temp Alarm
128 to 131
℃
-10
80
Temp Warning
132 to 135
℃
0
70
Voltage Alarm
144 to 147
V
2.97
3.63
Voltage Warning
148 to 151
V
3.135
3.465
TX Power Alarm
192 to 195
dBm
-4
8.2
TX Power Warning
196 to 199
dBm
-1
6.5
RX Power Alarm
176 to 179
dBm
-31
-4
RX Power Warning
180 to 183
dBm
-28
-7
9 Mechanical Specifications
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